In this paper, we present a method for generating checker circuits from sequential-extended regular expressions (SEREs). Such sequences form the core of increasingly-used Assertion...
This paper details the development, implementation, and results of Synthia, a system for the synthesis of Finite State Machines (FSMs) to field-programmable logic. Our approach us...
George A. Constantinides, Peter Y. K. Cheung, Wayn...
Distributed constraint optimization problems (DCOPs) are a popular way of formulating and solving agent-coordination problems. It is often desirable to solve DCOPs optimally with m...
This paper presents new timing analysis algorithms for efficient state space exploration during timed circuit synthesis. Timed circuits are a class of asynchronous circuits that i...
The success of a genetic programming system in solving a problem is often a function of the available computational resources. For many problems, the larger the population size an...