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» Synthesis of Efficient Linear Test Pattern Generators
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HIS
2001
13 years 10 months ago
Linear Discriminant Text Classification in High Dimension
Abstract. Linear Discriminant (LD) techniques are typically used in pattern recognition tasks when there are many (n >> 104 ) datapoints in low-dimensional (d < 102 ) spac...
András Kornai, J. Michael Richards
DSD
2006
IEEE
93views Hardware» more  DSD 2006»
14 years 3 months ago
High-Level Decision Diagram based Fault Models for Targeting FSMs
Recently, a number of works have been published on implementing assignment decision diagram models combined with SAT methods to address register-transfer level test pattern genera...
Jaan Raik, Raimund Ubar, Taavi Viilukas
IBPRIA
2007
Springer
14 years 3 months ago
Improving Piecewise-Linear Registration Through Mesh Optimization
Abstract. Piecewise-linear methods accomplish the registration by dividing the images in corresponding triangular patches, which are individually mapped through affine transformati...
Vicente Arévalo, Javier González
DAC
2005
ACM
13 years 11 months ago
Path delay test compaction with process variation tolerance
In this paper we propose a test compaction method for path delay faults in a logic circuit. The method generates a compact set of two-pattern tests for faults on long paths select...
Seiji Kajihara, Masayasu Fukunaga, Xiaoqing Wen, T...
ICES
2000
Springer
140views Hardware» more  ICES 2000»
14 years 21 days ago
Evolving Cellular Automata for Self-Testing Hardware
Testing is a key issue in the design and production of digital circuits: the adoption of BIST (Built-In Self-Test) techniques is increasingly popular, but requires efficient algori...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...