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TVLSI
2010
13 years 3 months ago
LOPASS: A Low-Power Architectural Synthesis System for FPGAs With Interconnect Estimation and Optimization
In this paper, we present a low-power architectural synthesis system (LOPASS) for field-programmable gate-array (FPGA) designs with interconnect power estimation and optimization. ...
Deming Chen, Jason Cong, Yiping Fan, Lu Wan
ICCD
2004
IEEE
119views Hardware» more  ICCD 2004»
14 years 5 months ago
Simultaneous Scheduling, Binding and Layer Assignment for Synthesis of Vertically Integrated 3D Systems
Three dimensional vertically integrated systems allow active devices to be placed on multiple device layers. In recent years, a number of research efforts have addressed physical ...
Madhubanti Mukherjee, Ranga Vemuri
RTAS
2010
IEEE
13 years 7 months ago
Approximate Bandwidth Allocation for Fixed-Priority-Scheduled Periodic Resources
Recent research in compositional real-time systems has focused on determination of a component’s real-time interface parameters. An important objective in interface-parameter de...
Farhana Dewan, Nathan Fisher
ECAI
1998
Springer
14 years 25 days ago
Optimal Scheduling of Dynamic Progressive Processing
Progressive processing allows a system to satisfy a set of requests under time pressure by limiting the amount of processing allocated to each task based on a predefined hierarchic...
Abdel-Illah Mouaddib, Shlomo Zilberstein
EUROMICRO
1999
IEEE
14 years 27 days ago
Design Space Exploration in System Level Synthesis under Memory Constraints
This paper addresses the problem of component selection, task assignment and task scheduling for distributed embedded computer systems. Such systems have a large number of constra...
Radoslaw Szymanek, Krzysztof Kuchcinski