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» Synthesis of quantum logic circuits
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ASYNC
2003
IEEE
119views Hardware» more  ASYNC 2003»
14 years 21 days ago
Asynchronous DRAM Design and Synthesis
We present the design of a high performance on-chip pipelined asynchronous DRAM suitable for use in a microprocessor cache. Although traditional DRAM structures suffer from long a...
Virantha N. Ekanayake, Rajit Manohar
FPL
2000
Springer
155views Hardware» more  FPL 2000»
13 years 11 months ago
Synthesis and Implementation of RAM-Based Finite State Machines in FPGAs
This paper discusses the design and implementation of finite state machines (FSM) with combinational circuits that are built primarily from RAM blocks. It suggests a novel state as...
Valery Sklyarov
ITCC
2002
IEEE
14 years 10 days ago
FSM Implementation in Embedded Memory Blocks of Programmable Logic Devices Using Functional Decomposition
: Since modern programmable devices contain embedded memory blocks, there exists a possibility to implement Finite State Machines (FSM) using such blocks. The size of the memory av...
Henry Selvaraj, Mariusz Rawski, Tadeusz Luba
PDP
2003
IEEE
14 years 21 days ago
A Parallel Evolutionary Algorithm for Circuit Partitioning
As general-purpose parallel computers are increasingly being used to speed up different VLSI applications, the development of parallel algorithms for circuit testing, logic minimi...
Raul Baños, Consolación Gil, Maria D...
FPL
2006
Springer
158views Hardware» more  FPL 2006»
13 years 11 months ago
Actual-Delay Circuits on FPGA: Trading-Off Luts for Speed
FPGA devices exhibit manufacturing variability. Device ratings and Timing margins are typically used in order to cope with inter-device and intra-device variability respectively. ...
Evangelia Kassapaki, Pavlos M. Mattheakis, Christo...