85 search results - page 10 / 17 » Synthesizable High Level Hardware Descriptions |
INFOCOM
2000
IEEE
14 years 2 months ago
2000
IEEE
-In this paper, we present a fast and scalable pipelined priority queue architecture for use in high-performance switches with support for fine-grained quality of service (QoS) gu...
VLSID
2006
IEEE
14 years 3 months ago
2006
IEEE
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
FPL
2001
Springer
14 years 2 months ago
2001
Springer
This paper presents the benefits of using a generic FPGA tool set developed at the university of Brest for programming virtual FPGA structures. From a high level FPGA description,...
HPCN
1995
Springer
14 years 1 months ago
1995
Springer
The Mermaid project focuses on the construction of simulation models for MIMD multi-computers in order to evaluate them and to give estimates of the system’s performance. A multi...
MSO
2003
13 years 11 months ago
2003
The use of sub-optimal digital systems can at times lead to high speed, efficient, costeffective structures that are sufficient to perform needed tasks. We describe here a system ...