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» System Design Validation Using Formal Models
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DATE
2005
IEEE
119views Hardware» more  DATE 2005»
14 years 1 months ago
Functional Validation of System Level Static Scheduling
Increase in system level modeling has given rise to a need for efficient functional validation of models above cycle accurate level. This paper presents a technique for comparing...
Samar Abdi, Daniel D. Gajski
FORTE
1998
13 years 9 months ago
Hardware - Software Co-design of embedded telecommunication systems using multiple formalisms for application development
: In this paper a co-design methodology based on multiformalism modelling is presented. It defines a platform that integrates different notations and, the necessary mechanisms to h...
Nikos S. Voros, S. K. Tsasakou, C. Valderrama, S. ...
FORTE
2007
13 years 9 months ago
Formal Analysis of Publish-Subscribe Systems by Probabilistic Timed Automata
Abstract. The publish-subscribe architectural style has recently emerged as a promising approach to tackle the dynamism of modern distributed applications. The correctness of these...
Fei He, Luciano Baresi, Carlo Ghezzi, Paola Spolet...
ANSS
2002
IEEE
14 years 26 days ago
A Flow Injection Model Using Cell-DEVS
Cell-DEVS is an extension to the DEVS formalism that allows the definition of cellular models. Complex physical systems can be defined using simple rules, reducing the development...
Alejandro Troccoli, Javier Ameghino, Fernando I&nt...
ICSE
2007
IEEE-ACM
14 years 8 months ago
When Role Models Have Flaws: Static Validation of Enterprise Security Policies
Modern multiuser software systems have adopted RoleBased Access Control (RBAC) for authorization management. This paper presents a formal model for RBAC policy validation and a st...
Marco Pistoia, Stephen J. Fink, Robert J. Flynn, E...