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» System Design Validation Using Formal Models
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ICST
2008
IEEE
14 years 2 months ago
Designing and Building a Software Test Organization
–Abstract for conference - preliminary Model-Based Testing: Models for Test Cases Jan Tretmans, Embedded Systems Institute, Eindhoven : Systematic testing of software plays an im...
Bruce Benton
ISORC
2000
IEEE
13 years 11 months ago
Verification of UML-Based Real-Time System Designs by Means of cTLA
The Unified Modeling Language UML is well-suited for the design of real-time systems. In particular, the design of dynamic system behaviors is supported by interaction diagrams an...
Günter Graw, Peter Herrmann, Heiko Krumm
DAC
1996
ACM
14 years 1 days ago
Integrating Formal Verification Methods with A Conventional Project Design Flow
We present a formal verification methodology that we have used on a computer system design project. The methodology integrates a temporal logic model checker with a conventional pr...
Ásgeir Th. Eiríksson
ICCS
2007
Springer
13 years 9 months ago
Conceptual Graphs as Cooperative Formalism to Build and Validate a Domain Expertise
Abstract. This work takes place in the general context of the construction and validation of a domain expertise. It aims at the cooperation of two kinds of knowledge, heterogeneous...
Rallou Thomopoulos, Jean-François Baget, Ol...
ISOLA
2010
Springer
13 years 5 months ago
HATS: Highly Adaptable and Trustworthy Software Using Formal Methods
The HATS project develops a formal method for the design, analysis, and implementation of highly adaptable software systems that are at the same time characterized by a high demand...
Reiner Hähnle