10159 search results - page 48 / 2032 » System Design Validation Using Formal Models |
ICECCS
2009
IEEE
14 years 2 months ago
2009
IEEE
Distributed information systems are critical to the functioning of many businesses; designing them to be dependable is a challenging but important task. We report our experience i...
BCSHCI
2007
13 years 9 months ago
2007
The use of formal models for user interface design can provide a number of benefits. It can help to ensure consistency across designs for multiple platforms, prove properties such...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—The complexity of the test infrastructure and test strategies in systems-on-chip approaches the complexity of the functional design space. This paper presents test design space ...
CORR
2008
Springer
13 years 8 months ago
2008
Springer
Synchronous languages rely on formal methods to ease the development of applications in an efficient and reusable way. Formal methods have been advocated as a means of increasing t...
GLVLSI
2006
IEEE
14 years 2 months ago
2006
IEEE
Functional verification is one of the major bottlenecks in microprocessor design. Simulation-based techniques are the most widely used form of processor verification. Efficient ...