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» System Design Validation Using Formal Models
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DATE
2002
IEEE
137views Hardware» more  DATE 2002»
14 years 1 months ago
The Modelling of Embedded Systems Using HASoC
We present a design method (HASoC) for the lifecycle modelling of embedded systems that are targeted primarily, but not necessarily, at SoC implementations. The object-oriented de...
M. D. Edwards, P. N. Green
SIGSOFT
2005
ACM
14 years 8 months ago
CHARMY: an extensible tool for architectural analysis
Charmy is a framework for designing and validating architectural specifications. In the early stages of the software development process, the Charmy framework assists the software...
Paola Inverardi, Henry Muccini, Patrizio Pelliccio...
COMPSAC
2003
IEEE
14 years 1 months ago
Automating Checking of Models Built Using a Graphically Based Formal Modelling Language
RDT is a graphical formal modelling language in which the modeller works by constructing diagrams of the processes in their model which they then join together to form complete sy...
Robert John Walters
FLAIRS
2001
13 years 9 months ago
Validity of First-Order Knowledge Bases
A knowledge base is maintained by modifying its conceptual model and by using those modifications to specify changes to its implementation. The maintenance problem is to determine...
John K. Debenham
FMOODS
2007
13 years 9 months ago
On Formal Analysis of OO Languages Using Rewriting Logic: Designing for Performance
Rewriting logic provides a powerful, flexible mechanism for language definition and analysis. This flexibility in design can lead to problems during analysis, as different desi...
Mark Hills, Grigore Rosu