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» System Design Validation Using Formal Models
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CODES
2006
IEEE
14 years 2 months ago
TLM/network design space exploration for networked embedded systems
This paper presents a methodology to combine Transaction Level Modeling and System/Network co-simulation for the design of networked embedded systems. As a result, a new design di...
Nicola Bombieri, Franco Fummi, Davide Quaglia
SIGMETRICS
2002
ACM
107views Hardware» more  SIGMETRICS 2002»
13 years 7 months ago
Passage time distributions in large Markov chains
Probability distributions of response times are important in the design and analysis of transaction processing systems and computercommunication systems. We present a general tech...
Peter G. Harrison, William J. Knottenbelt
HICSS
2008
IEEE
119views Biometrics» more  HICSS 2008»
14 years 2 months ago
Eliciting and Validating Knowledge in Knowledge Management Systems
This article identifies two significant challenges in implementing Knowledge Management Systems (KMS), then, proposes solutions based on information economics. A knowledge market ...
Hind Benbya, Marshall W. van Alstyne
APSEC
2001
IEEE
13 years 11 months ago
Formal Specification of Mixed Components with Korrigan
Formal specifications are now widely accepted in software development. Recently, the need for a separation of concerns with reference to static and dynamic aspects appeared. Furth...
Christine Choppy, Pascal Poizat, Jean-Claude Royer
AIME
2005
Springer
14 years 1 months ago
Interactive Knowledge Validation in CBR for Decision Support in Medicine
Abstract. In most case-based reasoning (CBR) systems there has been little research done on validating new knowledge, specifically on how previous knowledge differs from current k...
Monica H. Ou, Geoff A. W. West, Mihai Lazarescu, C...