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» System Exploration of SystemC Designs
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FDL
2005
IEEE
14 years 2 months ago
Implementation of a SystemC based Environment
Verification and validation are key issues for today's SoC design projects. This paper presents the implementation of a SystemC based environment for transaction-based verifi...
Richard Hoffer, Frank Baszynski
SIES
2010
IEEE
13 years 6 months ago
Verification of a CAN bus model in SystemC with functional coverage
Abstract--Many heterogeneous embedded systems, for example industrial automation and automotive applications, require hard-real time constraints to be exhaustively verified - which...
Christoph Kuznik, Gilles B. Defo, Wolfgang Mü...
FDL
2005
IEEE
14 years 2 months ago
An HW/SW Co-design Environment based on UML and SystemC
This paper outlines some fundamental concepts for the development of a system design framework based on standard notations and common CASE tools. We describe an environment for HW...
Elvinia Riccobene, Patrizia Scandurra, Alberto Ros...
FDL
2005
IEEE
14 years 2 months ago
Hardware Synthesis of Parallel Machines from SystemC
Heterogeneous system specifications implicitly assume parallel execution of their components that rely on supporting platform architectures and operating systems. Unfortunately, c...
Antoni Portero, Lluis Ribas, Jordi Carrabina
ISMVL
2003
IEEE
111views Hardware» more  ISMVL 2003»
14 years 2 months ago
Modeling Multi-Valued Circuits in SystemC
The complexity of todays hardware systems steadily increases. Due to this fact new ways of efficiently describing systems are investigated. A very promising approach in this area...
Daniel Große, Görschwin Fey, Rolf Drech...