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RSP
2003
IEEE
103views Control Systems» more  RSP 2003»
14 years 2 months ago
An Instruction Throughput Model of Superscalar Processors
With advances in semiconductor technology, processors are becoming larger and more complex. Future processor designers will face an enormous design space, and must evaluate more a...
Tarek M. Taha, D. Scott Wills
ACMDIS
2006
ACM
14 years 3 months ago
The impact of pre-patterns on the design of digital home applications
Recent research suggests design pre-patterns, structured collections of evidence-based research and design knowledge, provide a useful resource for design activities in emerging a...
T. Scott Saponas, Madhu K. Prabaker, Gregory D. Ab...
NSDI
2004
13 years 11 months ago
Designing a DHT for Low Latency and High Throughput
Designing a wide-area distributed hash table (DHT) that provides high-throughput and low-latency network storage is a challenge. Existing systems have explored a range of solution...
Frank Dabek, Jinyang Li, Emil Sit, James Robertson...
SIGMETRICS
2009
ACM
103views Hardware» more  SIGMETRICS 2009»
14 years 4 months ago
Restrained utilization of idleness for transparent scheduling of background tasks
A common practice in system design is to treat features intended to enhance performance and reliability as low priority tasks by scheduling them during idle periods, with the goal...
Ningfang Mi, Alma Riska, Xin Li, Evgenia Smirni, E...
MIDDLEWARE
2007
Springer
14 years 3 months ago
Using checkpointing to recover from poor multi-site parallel job scheduling decisions
Recent research in multi-site parallel job scheduling leverages user-provided estimates of job communication characteristics to effectively partition the job across multiple clus...
William M. Jones