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CGA
2011
13 years 2 months ago
Visualization at Supercomputing Centers: The Tale of Little Big Iron and the Three Skinny Guys
Supercomputing Centers (SC’s) are unique resources that aim to enable scientific knowledge discovery through the use of large computational resources, the Big Iron. Design, acq...
E. Wes Bethel, John Van Rosendale, Dale Southard, ...
CODES
2009
IEEE
14 years 12 days ago
Native MPSoC co-simulation environment for software performance estimation
Performance estimation of Multi-Processor System-On-Chip (MPa high abstraction level is required in order to perform early architecture exploration and accurate design validations...
Patrice Gerin, Mian Muhammad Hamayun, Fréd&...
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
13 years 5 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
CIKM
2008
Springer
13 years 9 months ago
Feasibility of a primarily digital research library
This position paper explores the issues related to the feasibility of having a primarily digital research library support the teaching and research needs of a university. The Asia...
Geneva L. Henry, Lisa M. Spiro
HICSS
2005
IEEE
159views Biometrics» more  HICSS 2005»
14 years 1 months ago
A Repeatable Collaboration Process for Usability Testing
Evaluating the usability of an application is a crucial activity in systems development projects. It is often done collaboratively, involving groups of current or future users, us...
Gert-Jan de Vreede, Ann L. Fruhling, Anita Chakrap...