Sciweavers

12333 search results - page 2298 / 2467
» System Level Modelling for Hardware Software Systems
Sort
View
IWMM
2009
Springer
107views Hardware» more  IWMM 2009»
15 years 9 months ago
Self-recovery in server programs
It is important that long running server programs retain availability amidst software failures. However, server programs do fail and one of the important causes of failures in ser...
Vijay Nagarajan, Dennis Jeffrey, Rajiv Gupta
108
Voted
CODES
2008
IEEE
15 years 8 months ago
Don't forget memories: a case study redesigning a pattern counting ASIC circuit for FPGAs
Modern embedded compute platforms increasingly contain both microprocessors and field-programmable gate arrays (FPGAs). The FPGAs may implement accelerators or other circuits to s...
David Sheldon, Frank Vahid
113
Voted
CODES
2007
IEEE
15 years 8 months ago
Channel trees: reducing latency by sharing time slots in time-multiplexed networks on chip
Networks on Chip (NoC) have emerged as the design paradigm for scalable System on Chip communication infrastructure. A growing number of applications, often with firm (FRT) or so...
Andreas Hansson, Martijn Coenen, Kees Goossens
114
Voted
CODES
2007
IEEE
15 years 8 months ago
Smart driver for power reduction in next generation bistable electrophoretic display technology
Microencapsulated electrophoretic displays (EPDs) are quickly emerging as an important technology for use in battery-powered portable computing devices. Thanks to bistability and ...
Michael A. Baker, Aviral Shrivastava, Karam S. Cha...
LCPC
2007
Springer
15 years 8 months ago
Pillar: A Parallel Implementation Language
Abstract. As parallelism in microprocessors becomes mainstream, new programming languages and environments are emerging to meet the challenges of parallel programming. To support r...
Todd Anderson, Neal Glew, Peng Guo, Brian T. Lewis...
« Prev « First page 2298 / 2467 Last » Next »