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103
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CASES
2004
ACM
15 years 8 months ago
Procedure placement using temporal-ordering information: dealing with code size expansion
Abstract— In a direct-mapped instruction cache, all instructions that have the same memory address modulo the cache size, share a common and unique cache slot. Instruction cache ...
Christophe Guillon, Fabrice Rastello, Thierry Bida...
106
Voted
LCPC
2004
Springer
15 years 7 months ago
Performance of OSCAR Multigrain Parallelizing Compiler on SMP Servers
Abstract. This paper describes performance of OSCAR multigrain parallelizing compiler on various SMP servers, such as IBM pSeries 690, Sun Fire V880, Sun Ultra 80, NEC TX7/i6010 an...
Kazuhisa Ishizaka, Takamichi Miyamoto, Jun Shirako...
135
Voted
LCPC
2004
Springer
15 years 7 months ago
Empirical Performance-Model Driven Data Layout Optimization
Abstract. Empirical optimizers like ATLAS have been very effective in optimizing computational kernels in libraries. The best choice of parameters such as tile size and degree of l...
Qingda Lu, Xiaoyang Gao, Sriram Krishnamoorthy, Ge...
IEEEINTERACT
2003
IEEE
15 years 7 months ago
A Region-Based Compilation Infrastructure
: The traditional framework for back-end compilation is based on the scope of functions, which is a natural boundary to partition an entire program for compilation. However, the si...
Yang Liu, Zhaoqing Zhang, Ruliang Qiao, Roy Dz-Chi...
CC
2009
Springer
15 years 7 months ago
Scheduling Tasks to Maximize Usage of Aggregate Variables in Place
Single-assignment languages with copy semantics have a very simple and approachable programming model. A na¨ıve implementation of the copy semantics that copies the result of eve...
Samah Abu-Mahmeed, Cheryl McCosh, Zoran Budimlic, ...
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