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» System Synthesis for Networks of Programmable Blocks
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RSP
2000
IEEE
156views Control Systems» more  RSP 2000»
13 years 11 months ago
Quasi-Static Scheduling of Reconfigurable Dataflow Graphs for DSP Systems
Dataflow programming has proven to be popular for representing applications in rapid prototyping tools for digital signal processing (DSP); however, existing dataflow design tools...
Bishnupriya Bhattacharya, Shuvra S. Bhattacharyya
FPL
2006
Springer
161views Hardware» more  FPL 2006»
13 years 11 months ago
Predictive Load Balancing for Interconnected FPGAs
A Field Programmable Gate Array (FPGA), when used as a platform for implementing special-purpose computing architectures, offers the potential for increased functional parallelism...
Jason D. Bakos, Charles L. Cathey, Allen Michalski
GLVLSI
2003
IEEE
175views VLSI» more  GLVLSI 2003»
14 years 20 days ago
A custom FPGA for the simulation of gene regulatory networks
We present a unique FPGA that uses a mix of digital and large-signal analog computation for the simulation of gene regulatory networks. The prototype IC consists of a 4x5 array of...
Ilias Tagkopoulos, Charles A. Zukowski, German Cav...
IVS
2007
105views more  IVS 2007»
13 years 7 months ago
Visualization Summit 2007: ten research goals for 2010
At the first international Visualization Summit, more than 100 international researchers and practitioners defined and assessed nine original and important research goals in the c...
Remo Aslak Burkhard, Gennady L. Andrienko, Natalia...
VLSISP
2008
140views more  VLSISP 2008»
13 years 7 months ago
Regular Expression Matching in Reconfigurable Hardware
In this paper we describe a regular expression pattern matching approach for reconfigurable hardware. Following a Non-deterministic Finite Automata direction, we introduce three ne...
Ioannis Sourdis, João Bispo, João M....