Sciweavers

54 search results - page 8 / 11
» System chip test: how will it impact your design
Sort
View
VEE
2010
ACM
247views Virtualization» more  VEE 2010»
14 years 1 months ago
Capability wrangling made easy: debugging on a microkernel with valgrind
Not all operating systems are created equal. Contrasting traditional monolithic kernels, there is a class of systems called microkernels more prevalent in embedded systems like ce...
Aaron Pohle, Björn Döbel, Michael Roitzs...
FMOODS
2007
13 years 8 months ago
A Probabilistic Formal Analysis Approach to Cross Layer Optimization in Distributed Embedded Systems
We present a novel approach, based on probabilistic formal methods, to developing cross-layer resource optimization policies for resource limited distributed systems. One objective...
Minyoung Kim, Mark-Oliver Stehr, Carolyn L. Talcot...
TVLSI
2008
152views more  TVLSI 2008»
13 years 6 months ago
MMV: A Metamodeling Based Microprocessor Validation Environment
With increasing levels of integration of multiple processing cores and new features to support software functionality, recent generations of microprocessors face difficult validati...
Deepak Mathaikutty, Sreekumar V. Kodakara, Ajit Di...
VLSID
2008
IEEE
117views VLSI» more  VLSID 2008»
14 years 7 months ago
Single Event Upset: An Embedded Tutorial
Abstract-- With the continuous downscaling of CMOS technologies, the reliability has become a major bottleneck in the evolution of the next generation systems. Technology trends su...
Fan Wang, Vishwani D. Agrawal
HPCA
2006
IEEE
14 years 7 months ago
BulletProof: a defect-tolerant CMP switch architecture
As silicon technologies move into the nanometer regime, transistor reliability is expected to wane as devices become subject to extreme process variation, particle-induced transie...
Kypros Constantinides, Stephen Plaza, Jason A. Blo...