169 search results - page 22 / 34 » System level memory optimization for hardware-software co-de... |
IEEEINTERACT
2003
IEEE
14 years 1 months ago
2003
IEEE
This paper introduces a method for improving program run-time performance by gathering work in an application and executing it efficiently in an integrated thread. Our methods ext...
CODES
2005
IEEE
14 years 2 months ago
2005
IEEE
Biochips based on digital microfluidics offer a powerful platform for massively parallel biochemical analysis such as clinical diagnosis and DNA sequencing. Current full-custom de...
POPL
2000
ACM
14 years 24 days ago
2000
ACM
Distributed-memory programs are often written using a global address space: any process can name any memory location on any processor. Some languages completely hide the distincti...
CASES
2001
ACM
14 years 3 days ago
2001
ACM
Increased systems level integration has meant the movement of many traditionally off chip components onto a single chip including a processor, instruction storage, data path, and ...
CODES
2005
IEEE
14 years 2 months ago
2005
IEEE
This paper proposes a new efficient buffer management technique called shift buffering for automatic code synthesis from synchronous dataflow graphs (SDF). Two previous buffer man...