78 search results - page 4 / 16 » System level power and performance modeling of GALS point-to... |
ISCAS
2003
IEEE
14 years 22 days ago
2003
IEEE
Conventional ASIC designs are hard to be customized. Therefore DSP core-based ASIC design has potentially large payoff. This approach not only supports improved performance but al...
DATE
2002
IEEE
14 years 13 days ago
2002
IEEE
In this paper, we present an efficient methodology to validate high performance algorithms and prototype them using reconfigurable hardware. We follow a strict topdown Hardware/So...
GLOBECOM
2010
IEEE
13 years 5 months ago
2010
IEEE
In smart grid, a home appliance can adjust its power consumption level according to the realtime power price obtained from communication channels. Most studies on smart grid do not...
SIGCOMM
2009
ACM
14 years 2 months ago
2009
ACM
For wireless mobile Internet users the length of the battery life is one of the most important performance factors. The energy efficiency of the data transmission over radio is a ...
FDL
2004
IEEE
13 years 11 months ago
2004
IEEE
Reconfigurability is becoming an important part of System-on-Chip (SoC) design to cope with the increasing demands for simultaneous flexibility and computational power. Current ha...