816 search results - page 101 / 164 » System-Level Power Performance Analysis for Embedded Systems... |
MICRO
1997
IEEE
14 years 1 months ago
1997
IEEE
Most modern microprocessors employ one or two levels of on-chip caches in order to improve performance. These caches are typically implemented with static RAM cells and often occu...
BMCBI
2008
13 years 9 months ago
2008
Background: Biological signaling pathways that govern cellular physiology form an intricate web of tightly regulated interlocking processes. Data on these regulatory networks are ...
CODES
2007
IEEE
14 years 3 months ago
2007
IEEE
Multiple wireless technologies are converging to run on personal handhelds. The plethora of communication standards next to the cost issues of deeper submicron processing require ...
ESAS
2004
Springer
14 years 2 months ago
2004
Springer
Abstract. Low power consumption, low gate count, and high throughput are standard design criteria for cryptographic coprocessors designated for resource constrained devices such as...
RTAS
2008
IEEE
14 years 3 months ago
2008
IEEE
Message Sequence Charts (MSCs) are widely used for describing interaction scenarios between the components of a distributed system. Consequently, worst-case response time estimati...