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» SystemJ: A GALS language for system level design
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FLAIRS
2008
13 years 9 months ago
Automatic Measurement of Syntactic Complexity Using the Revised Developmental Level Scale
This paper describes a heuristics-based system for automatic measurement of syntactic complexity using the revised Developmental Level (D-Level) Scale (Rosenberg and Abbeduto, 198...
Xiaofei Lu
MEMOCODE
2003
IEEE
14 years 23 days ago
MoDe: A Method for System-Level Architecture Evaluation
System-level design methodologies for embedded HW/SW systems face several challenges: In order to be susceptible to systematic formal analysis based on state-space exploration, a ...
Jan Romberg, Oscar Slotosch, Gabor Hahn
ISSS
1995
IEEE
109views Hardware» more  ISSS 1995»
13 years 11 months ago
1995 high level synthesis design repository
In this paper we brie y describe a set of designs that can serve as examples for High Level Synthesis (HLS) systems. The designs vary in complexity from simple behavioral nite st...
Preeti Ranjan Panda, Nikil D. Dutt
FDL
2007
IEEE
13 years 11 months ago
Transactor-based Formal Verification of Real-time Embedded Systems
With the increasing complexity of today's embedded systems, there is a need to formally verify such designs at mixed abstraction levels. This is needed if some compoe describ...
Daniel Karlsson, Petru Eles, Zebo Peng
DASIP
2010
13 years 2 months ago
High level design space exploration of RVC codec specifications for multi-core heterogeneous platforms
Nowadays, the design flow of complex signal processing embedded systems starts with a specification of the application by means of a large and sequential program (usually in C/C++...
Christophe Lucarz, Ghislain Roquier, Marco Mattave...