: - One of the main bottlenecks when designing a network processing system is very often its memory subsystem. This is mainly due to the state-of-the-art network links operating at...
Ioannis Papaefstathiou, Theofanis Orphanoudakis, G...
This paper addresses exploitation of the capabilities of platform FPGAs to implement embedded networking for systems on chip. In particular, a methodology for exploring trade-offs...
Todd S. Sproull, Gordon J. Brebner, Christopher E....
Abstract. This paper presents a semantic web portal tool ONTOVIEWS for publishing RDF content on the web. ONTOVIEWS provides the portal designer with a content-based search engine ...
Distributed real-time and embedded (DRE) applications often possess stringent quality of service (QoS) requirements. Designing middleware for DRE applications poses several challe...
Arvind S. Krishna, Raymond Klefstad, Douglas C. Sc...
We present a framework for integrated scheduling of continuous media (CM) and other applications. The framework, called ARC scheduling, consists of a rate-controlled on-line CPU sc...