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COORDINATION
2005
Springer
14 years 3 months ago
Preserving Architectural Properties in Multithreaded Code Generation
Architectural descriptions can provide support for a formal representation of the structure and the overall behavior of software systems, which is suitable for an early assessment ...
Marco Bernardo, Edoardo Bontà
ICCD
1993
IEEE
111views Hardware» more  ICCD 1993»
14 years 2 months ago
Ravel-XL: A Hardware Accelerator for Assigned-Delay Compiled-Code Logic Gate Simulation
Ravel-XL is a single-boardhardware accelerator for gate-level digital logic simulation. It uses a standard levelizedcode approach to statically schedule gate evaluations.However, u...
Michael A. Riepe, João P. Marques Silva, Ka...

Book
494views
15 years 8 months ago
The Little Book of Semaphores
"I wrote the first edition this book with the goal of identifying synchronization idioms and patterns that could be understood in isolation and then assembled to solve compl...
Allen B. Downey
ENTCS
2008
70views more  ENTCS 2008»
13 years 10 months ago
Separate Compilation of Polychronous Specifications
As code generation for synchronous programs requires strong safety properties to be satisfied, compositionality becomes a difficult goal to achieve. Most synchronous languages, su...
Julien Ouy, Jean-Pierre Talpin, Loïc Besnard,...
PIMRC
2010
IEEE
13 years 7 months ago
Carrier frequency synchronization in the downlink of 3GPP LTE
Abstract--In this paper, we investigate carrier frequency synchronization in the downlink of 3GPP Long Term Evolution (LTE). A complete carrier frequency offset estimation and comp...
Qi Wang, Christian Mehlführer, Markus Rupp