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CISS
2008
IEEE
14 years 3 months ago
Overlay protection against link failures using network coding
Abstract—This paper introduces a network coding-based protection scheme against single and multiple link failures. The proposed strategy makes sure that in a connection, each nod...
Ahmed E. Kamal, Aditya Ramamoorthy
ARCS
2006
Springer
14 years 19 days ago
Adding Low-Cost Hardware Barrier Support to Small Commodity Clusters
The performance of the barrier operation can be crucial for many parallel codes. Especially distributed shared memory systems have to synchronize frequently to ensure the proper o...
Torsten Hoefler, Torsten Mehlan, Frank Mietke, Wol...
DAC
2009
ACM
14 years 10 months ago
Context-sensitive timing analysis of Esterel programs
Traditionally, synchronous languages, such as Esterel, have been compiled into hardware, where timing analysis is relatively easy. When compiled into software ? e.g., into sequent...
Lei Ju, Bach Khoa Huynh, Samarjit Chakraborty, Abh...
ASPLOS
2008
ACM
13 years 11 months ago
Communication optimizations for global multi-threaded instruction scheduling
The recent shift in the industry towards chip multiprocessor (CMP) designs has brought the need for multi-threaded applications to mainstream computing. As observed in several lim...
Guilherme Ottoni, David I. August
ASYNC
2007
IEEE
154views Hardware» more  ASYNC 2007»
14 years 3 months ago
Design of a High-Speed Asynchronous Turbo Decoder
This paper explores the advantages of high performance asynchronous circuits in a semi-custom standard cell environment for high-throughput turbo coding. Turbo codes are high-perf...
Pankaj Golani, Georgios D. Dimou, Mallika Prakash,...