We propose an FPGA chip architecture based on a conventional FPGA logic array core, in which I/O pins are clocked at a much higher rate than that of the logic array that they serv...
Conventional implementations of CORBA communication middleware incur significant overhead when used for performance-sensitive applications over high-speed networks. As gigabit ne...
Several recent papers have proposed or analyzed optimal algorithms to route all-to-all personalizedcommunication (AAPC) over communication networks such as meshes, hypercubes and ...
Abstract. We have previously developed image-guided navigation systems for thoracic abdominal interventions utilizing a three dimensional (3D) Cone-Beam CT (CBCT) image acquired at...
Ziv Yaniv, Jan Boese, Marily Sarmiento, Kevin Clea...
The principal aim of Project StORe is to provide middleware that will enable bi-directional links between source repositories of research data and the output repositories containi...