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» TSIC: Thermal Scheduling Simulator for Chip Multiprocessors
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PPL
2008
144views more  PPL 2008»
13 years 8 months ago
Rapid Prototyping of the Data-Driven Chip-Multiprocessor (d2-CMP) Using FPGAs
This paper presents the FPGA implementation of the prototype for the Data-Driven Chip-Multiprocessor (D2-CMP). In particular, we study the implementation of a Thread Synchronizati...
Konstantinos Tatas, Costas Kyriacou, Paraskevas Ev...
DAC
2006
ACM
13 years 10 months ago
A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip
With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor SystemOn-Chip (MPSoC) architectures have become widespread. T...
David Atienza, Pablo Garcia Del Valle, Giacomo Pac...
APPT
2009
Springer
14 years 3 months ago
A Fast Scheme to Investigate Thermal-Aware Scheduling Policy for Multicore Processors
Abstract. With more cores integrated into one single chip, the overall power consumption from the multiple concurrent running programs increases dramatically in a CMP processor whi...
Liqiang He, Cha Narisu
JSA
2007
191views more  JSA 2007»
13 years 8 months ago
Automated memory-aware application distribution for Multi-processor System-on-Chips
Mapping of applications on a Multiprocessor System-on-Chip (MP-SoC) is a crucial step to optimize performance, energy and memory constraints at the same time. The problem is formu...
Heikki Orsila, Tero Kangas, Erno Salminen, Timo D....
PDP
2011
IEEE
13 years 6 days ago
Energy-Aware Task Allocation for Network-on-Chip Based Heterogeneous Multiprocessor Systems
—Energy-efficiency is becoming one of the most critical issues in embedded system design. In Network-on-Chip (NoC) based heterogeneous Multiprocessor Systems, the energy consump...
Jia Huang, Christian Buckl, Andreas Raabe, Alois K...