7 search results - page 1 / 2 » Taming Single-Thread Program Performance on Many Distributed... |
ICPP
2008
IEEE
14 years 1 months ago
2008
IEEE
This paper presents a two-part study on managing distributed NUCA (Non-Uniform Cache Architecture) L2 caches in a future manycore processor to obtain high singlethread program per...
ISHPC
1999
Springer
13 years 11 months ago
1999
Springer
On-chip multiprocessor can be an alternative to the wide-issue superscalar processor approach which is currently the mainstream to exploit the increasing number of transistors on ...
EUROPAR
2010
Springer
13 years 8 months ago
2010
Springer
Abstract. Performance of the on-chip cache is critical for processor. The multithread program model usually employed by on-chip many-core architectures may have effects on cache ac...
ACMMSP
2006
ACM
14 years 26 days ago
2006
ACM
This paper proposes and studies a distributed L2 cache management approach through page-level data to cache slice mapping in a future processor chip comprising many cores. L2 cach...
IEEEPACT
2009
IEEE
14 years 1 months ago
2009
IEEE
Abstract—This paper proposes a new software-oriented approach for managing the distributed shared L2 caches of a chip multiprocessor (CMP) for latency-oriented multithreaded appl...