684 search results - page 116 / 137 » Techniques for Accelerating a Grammar-Checker |
AIPR
2008
IEEE
14 years 28 days ago
2008
IEEE
In this paper, we introduce real time image processing techniques using modern programmable Graphic Processing Units (GPU). GPUs are SIMD (Single Instruction, Multiple Data) device...
CC
2008
Springer
14 years 28 days ago
2008
Springer
Heterogeneous multi-core and streaming architectures such as the GPU, Cell, ClearSpeed, and Imagine processors have better power/ performance ratios and memory bandwidth than tradi...
DAC
2005
ACM
14 years 26 days ago
2005
ACM
In this paper we present the impact of dynamically translating any sequence of instructions into combinational logic. The proposed approach combines a reconfigurable architecture ...
KDD
2010
ACM
14 years 26 days ago
2010
ACM
The fused Lasso penalty enforces sparsity in both the coefficients and their successive differences, which is desirable for applications with features ordered in some meaningful w...
CSE
2008
IEEE
14 years 21 days ago
2008
IEEE
A well-known challenge during processor design is to obtain best possible results for a typical target application domain by combining flexibility and computational performance. A...