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» Techniques for Formal Verification of Digital Systems: A Sys...
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CIIA
2009
13 years 8 months ago
LCF-style for Secure Verification Platform based on Multiway Decision Graphs
Abstract. Formal verification of digital systems is achieved, today, using one of two main approaches: states exploration (mainly model checking and equivalence checking) or deduct...
Sa'ed Abed, Otmane Aït Mohamed
JOT
2007
169views more  JOT 2007»
13 years 7 months ago
Translating AUML Diagrams into Maude Specifications: A Formal Verification of Agents Interaction Protocols
Agents Interaction Protocols (AIPs) play a crucial role in multi-agents systems development. They allow specifying sequences of messages between agents. Major proposed protocols s...
Farid Mokhati, Noura Boudiaf, Mourad Badri, Linda ...
FLAIRS
2000
13 years 9 months ago
Verification of Cooperating Systems - An Approach Based on Formal Languages
Behaviour of systems is described by formal languages: the sets of all sequences of actions. Regarding ion, alphabetic language homomorphisms are compute abstract behaviours. To a...
Peter Ochsenschläger, Jürgen Repp, Rolan...
VLSID
2003
IEEE
180views VLSI» more  VLSID 2003»
14 years 8 months ago
Automating Formal Modular Verification of Asynchronous Real-Time Embedded Systems
Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often fl...
Pao-Ann Hsiung, Shu-Yu Cheng