This paper describes a technique which uses the Differential Non Linearity (DNL) test data for fault location and identification of the analog components of a flash ADC. In a flash...
Abstract. The design flow of systems-on-a-chip (SoCs) identifies several abstraction levels higher than the Register-Transfer-Level that constitutes the input of the synthesis tool...
Claude Helmstetter, Florence Maraninchi, Laurent M...
Abstract. We describe a numerical method for scale invariant detection of gesture patterns in continuous 2D motions. The algorithm is fast due to our rejection-based reasoning achi...
Radu-Daniel Vatavu, Laurent Grisoni, Stefan Gheorg...
IDDQ testing has been used as a test technique to supplement voltage testing of CMOS chips. The idea behind IDDQ testing is to declare a chip as faulty if the steady-state current...
Background: Obtaining physiological insights from microarray experiments requires computational techniques that relate gene expression data to functional information. Traditionall...
Anne M. Denton, Jianfei Wu, Megan K. Townsend, Pre...