77 search results - page 8 / 16 » Techniques for Region-Based Register Allocation |
FPL
2004
Springer
14 years 26 days ago
2004
Springer
A previous study [1] demonstrates the advantages of replacing registers by FPGA embedded memories during the storage allocation phase of High-Level Synthesis. The trend in new FPGA...
EMSOFT
2004
Springer
14 years 26 days ago
2004
Springer
Energy efficiency is rapidly becoming a first class optimization parameter for modern systems. Caches are critical to the overall performance and thus, modern processors (both hig...
CF
2008
ACM
13 years 9 months ago
2008
ACM
We develop architectural techniques for mitigating the impact of process variability. Our techniques hide the performance effects of slow components--including registers, function...
CASES
2003
ACM
14 years 22 days ago
2003
ACM
—We investigate the problem of memory reuse in order to reduce the memory needed to store an array variable. We develop techniques that can lead to smaller memory requirements in...
DAC
1989
ACM
13 years 11 months ago
1989
ACM
- New algorithms for high-level synthesis are presented. The first performs scheduling under hardware resource constraints and improves on commonly used list scheduling techniques ...