171 search results - page 5 / 35 » Technology mapping for domino logic |
FPGA
2008
ACM
13 years 9 months ago
2008
ACM
This paper presents a new technology mapper, WireMap. The mapper uses an edge flow heuristic to improve the routability of a mapped design. The heuristic is applied during the ite...
DAC
1996
ACM
13 years 11 months ago
1996
ACM
Technology mapping requires the unmapped logic network to be represented in terms of base functions, usually two-input NORs and inverters. Technology decomposition is the step tha...
FPGA
1997
ACM
13 years 11 months ago
1997
ACM
We present a general approach to the FPGA technology mapping problem that applies to any logic block composed of lookup tables LUTs and can yield optimal solutions. The connecti...
FPGA
2000
ACM
13 years 11 months ago
2000
ACM
It has become clear that on-chip storage is an essential component of high-density FPGAs. These arrays were originally intended to implement storage, but recent work has shown tha...
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
Energy recovery clocking results in significant energy savings in clock distribution networks as compared to conventional squarewave clocking. However, since energy recovery clock...