62 search results - page 9 / 13 » Technology mapping for k m-macrocell based FPGAs |
FPGA
2010
ACM
14 years 4 months ago
2010
ACM
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
FPGA
2007
ACM
14 years 2 months ago
2007
ACM
Chip-multiprocessors are quickly gaining momentum in all segments of computing. However, the practical success of CMPs strongly depends on addressing the difficulty of multithread...
DAC
2009
ACM
13 years 5 months ago
2009
ACM
For hardware security applications, the availability of secret keys is a critical component for secure activation, IC authentication and for other important applications including...
KES
2004
Springer
14 years 1 months ago
2004
Springer
– This paper describes a text categorization approach that is based on a combination of a newly designed text representation with a kNN classifier. The new text document represen...
CASES
2003
ACM
2003
ACM
A hierarchical approach for energy efficient application design using heterogeneous embedded systems
13 years 11 months ago
Several features such as reconfiguration, voltage and frequency scaling, low-power operating states, duty-cycling, etc. are exploited for latency and energy efficient application ...