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» Temperature Variable Supply Voltage for Power Reduction
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VLSID
2008
IEEE
142views VLSI» more  VLSID 2008»
14 years 1 months ago
Incorporating PVT Variations in System-Level Power Exploration of On-Chip Communication Architectures
With the shift towards deep sub-micron (DSM) technologies, the increase in leakage power and the adoption of poweraware design methodologies have resulted in potentially significa...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
IPPS
2009
IEEE
14 years 2 months ago
Power-aware load balancing of large scale MPI applications
Power consumption is a very important issue for HPC community, both at the level of one application or at the level of whole workload. Load imbalance of a MPI application can be e...
Maja Etinski, Julita Corbalán, Jesús...
DAC
2005
ACM
13 years 9 months ago
Keeping hot chips cool
With 90nm CMOS in production and 65nm testing in progress, power has been pushed to the forefront of design metrics. This paper will outline practical techniques that are used to ...
Ruchir Puri, Leon Stok, Subhrajit Bhattacharya
ISLPED
2009
ACM
168views Hardware» more  ISLPED 2009»
14 years 1 months ago
Low power circuit design based on heterojunction tunneling transistors (HETTs)
The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...
Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, ...
CORR
2007
Springer
88views Education» more  CORR 2007»
13 years 7 months ago
Design and Fabrication of a Micro Electrostatic Vibration-to-Electricity Energy Converter
This paper presents a micro electrostatic vibration-toelectricity energy converter. For the 3.3 V supply voltage and 1cm2 chip area constraints, optimal design parameters were fou...
Yi Chiu, Chiung-Ting Kuo, Yu-Shan Chu