With the shift towards deep sub-micron (DSM) technologies, the increase in leakage power and the adoption of poweraware design methodologies have resulted in potentially significa...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
Power consumption is a very important issue for HPC community, both at the level of one application or at the level of whole workload. Load imbalance of a MPI application can be e...
With 90nm CMOS in production and 65nm testing in progress, power has been pushed to the forefront of design metrics. This paper will outline practical techniques that are used to ...
The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...
Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, ...
This paper presents a micro electrostatic vibration-toelectricity energy converter. For the 3.3 V supply voltage and 1cm2 chip area constraints, optimal design parameters were fou...