99 search results - page 13 / 20 » Temporal Decomposition for Logic Optimization |
CVPR
2007
IEEE
14 years 9 months ago
2007
IEEE
Class syntax can be used to 1) model temporal or locational evolvement of class labels of feature observation sequences, 2) correct classification errors of static classifiers if ...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
Soft errors in logic are emerging as a significant reliability problem for VLSI designs. This paper presents novel circuit optimization techniques to mitigate soft error rates (SE...
TSP
2010
13 years 2 months ago
2010
This paper considers the optimization of transceivers with decision feedback equalizers (DFE) for slowly time-varying memoryless multi-input multi-output (MIMO) channels. The data ...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
Negative Bias Temperature Instability (NBTI), a PMOS aging phenomenon causing significant loss on circuit performance and lifetime, has become a critical challenge for temporal re...
CAISE
2004
Springer
14 years 28 days ago
2004
Springer
Advanced Business Process Management (BPM) tools enable the decomposition of previously integrated and often ill-defined processes into reusable process modules. These process modu...