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» Temporal Logic Verification Using Simulation
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WSC
2000
13 years 8 months ago
Soft-commissioning: hardware-in-the-loop-based verification of controller software
The basic idea of Soft-Commissioning (SoftCom) is to test industrial control software by connecting a controller, e. g. a PLC (Programmable Logic Controller) to a commercial discr...
Harald Schludermann, Thomas Kirchmair, Markus Vord...
ACTA
2010
109views more  ACTA 2010»
13 years 6 months ago
On regular temporal logics with past
The IEEE standardized Property Specification Language, PSL for short, extends the well-known linear-time temporal logic LTL with so-called semi-extended regular expressions. PSL an...
Christian Dax, Felix Klaedtke, Martin Lange
ICALP
2009
Springer
14 years 7 months ago
On Regular Temporal Logics with Past,
The IEEE standardized Property Specification Language, PSL for short, extends the well-known linear-time temporal logic LTL with so-called semi-extended regular expressions. PSL an...
Christian Dax, Felix Klaedtke, Martin Lange
CIBB
2009
13 years 7 months ago
On the Use of Temporal Formal Logic to Model Gene Regulatory Networks
Modelling activities in molecular biology face the difficulty of prediction to link molecular knowledge with cell phenotypes. Even when the interaction graph between molecules is k...
Gilles Bernot, Jean-Paul Comet
ISMVL
1994
IEEE
98views Hardware» more  ISMVL 1994»
13 years 10 months ago
Digital Circuit Verification Using Partially-Ordered State Models
Many aspects of digital circuit operation can be efficiently verified by simulating circuit operation over "weakened" state values. This technique has long been practice...
Carl-Johan H. Seger, Randal E. Bryant