203 search results - page 5 / 41 » Temporal Logic Verification Using Simulation |
ICCAD
2002
IEEE
14 years 3 months ago
2002
IEEE
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
FM
2009
Springer
13 years 4 months ago
2009
Springer
Abstract. This paper presents a Rewriting Logic framework that formalizes the interactions between Web servers and Web browsers through icating protocol abstracting HTTP. The propo...
ICSE
2008
IEEE-ACM
14 years 7 months ago
2008
IEEE-ACM
In grid workflow systems, temporal correctness is critical to assure the timely completion of grid workflow execution. To monitor and control the temporal correctness, fixed-time ...
SIGSOFT
2005
ACM
14 years 7 months ago
2005
ACM
Fluent model checking is an automated technique for verifying that an event-based operational model satisfies some state-based declarative properties. The link between the event-b...
ECAI
2010
Springer
13 years 7 months ago
2010
Springer
Abstract. The agent programming language GOLOG and the underlying Situation Calculus have become popular means for the modelling and control of autonomous agents such as mobile rob...