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CAL
2010
13 years 7 months ago
A Dynamic Pressure-Aware Associative Placement Strategy for Large Scale Chip Multiprocessors
This paper describes dynamic pressure-aware associative placement (DPAP), a novel distributed cache management scheme for large-scale chip multiprocessors. Our work is motivated by...
Mohammad Hammoud, Sangyeun Cho, Rami G. Melhem
ICIP
1994
IEEE
14 years 11 months ago
Robust Optical Flow Estimation
Motion information is essential in many computer vision and video analysis tasks. Since MPEG is still one of the most prevalent formats for representing, transferring and storing ...
Sugata Ghosal, Rajiv Mehrotra
JMLR
2002
133views more  JMLR 2002»
13 years 9 months ago
Learning Precise Timing with LSTM Recurrent Networks
The temporal distance between events conveys information essential for numerous sequential tasks such as motor control and rhythm detection. While Hidden Markov Models tend to ign...
Felix A. Gers, Nicol N. Schraudolph, Jürgen S...
CODES
2004
IEEE
14 years 1 months ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis
ISCA
2007
IEEE
161views Hardware» more  ISCA 2007»
14 years 4 months ago
Physical simulation for animation and visual effects: parallelization and characterization for chip multiprocessors
We explore the emerging application area of physics-based simulation for computer animation and visual special effects. In particular, we examine its parallelization potential and...
Christopher J. Hughes, Radek Grzeszczuk, Eftychios...