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» Temporal reasoning in process planning
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GLVLSI
2009
IEEE
150views VLSI» more  GLVLSI 2009»
14 years 4 months ago
Contradictory antecedent debugging in bounded model checking
In the context of formal verification Bounded Model Checking (BMC) has shown to be very powerful for large industrial designs. BMC is used to check whether a circuit satisfies a...
Daniel Große, Robert Wille, Ulrich Kühn...
RTAS
2009
IEEE
14 years 4 months ago
On Time-Aware Instrumentation of Programs
—Software instrumentation is a key technique in many stages of the development process. It is of particular importance for debugging embedded systems. Instrumented programs produ...
Sebastian Fischmeister, Patrick Lam
ICMI
2007
Springer
215views Biometrics» more  ICMI 2007»
14 years 4 months ago
Visual inference of human emotion and behaviour
We address the problem of automatic interpretation of nonexaggerated human facial and body behaviours captured in video. We illustrate our approach by three examples. (1) We intro...
Shaogang Gong, Caifeng Shan, Tao Xiang
ICMCS
2005
IEEE
110views Multimedia» more  ICMCS 2005»
14 years 3 months ago
Electronic Chronicles: Empowering Individuals, Groups, and Organizations
Continuing strides in processing, storage, sensing, and networking technologies are enabling people to capture their activities and experiences as greater volumes of ever-richer m...
Gopal Pingali, R. Jain
EUC
2005
Springer
14 years 3 months ago
A Multi-dimensional Model for Task Representation and Allocation in Intelligent Environments
Abstract. In the future, homes will have numerous intelligent communicating devices, and the user would like to configure and coordinate their actions. Appliances and people in in...
Victor Zamudio, Victor Callaghan, Jeannette Shiaw-...