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» Test Derivation from Timed Automata
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ASPDAC
2005
ACM
142views Hardware» more  ASPDAC 2005»
13 years 10 months ago
Bridging fault testability of BDD circuits
Abstract— In this paper we study the testability of circuits derived from Binary Decision Diagrams (BDDs) under the bridging fault model. It is shown that testability can be form...
Junhao Shi, Görschwin Fey, Rolf Drechsler
ICST
2009
IEEE
14 years 3 months ago
An Initial Characterization of Industrial Graphical User Interface Systems
To date we have developed and applied numerous model-based GUI testing techniques; however, we are unable to provide definitive improvement schemes to real-world GUI test planners...
Penelope A. Brooks, Brian P. Robinson, Atif M. Mem...
ICIP
2007
IEEE
14 years 9 months ago
Accurate and Robust Image Alignment for Road Profile Reconstruction
In this paper we propose a new approach of the two-image alignment problem based on a functional representation of images. This allows us to derive a one-to-several correspondence,...
Jean-Philippe Tarel, Pierre Charbonnier, Sio-Song ...
ICMCS
2008
IEEE
129views Multimedia» more  ICMCS 2008»
14 years 3 months ago
Evaluation of segment-based proxy caching for video on demand
In this paper, we derive an analytical model for the evaluation of the performance of a Video on Demand (VoD) system. The model estimates the mean waiting time achievable by the P...
Muhammad Muhammad, Wei Tu, Eckehard G. Steinbach
DAC
1999
ACM
14 years 9 months ago
CAD Directions for High Performance Asynchronous Circuits
This paper describes a novel methodology for high performance asynchronous design based on timed circuits and on CAD support for their synthesis using Relative Timing. This method...
Ken S. Stevens, Shai Rotem, Steven M. Burns, Jordi...