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» Test Generation for Designs with On-Chip Clock Generators
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CCS
2006
ACM
14 years 18 days ago
TCG inside?: a note on TPM specification compliance
The Trusted Computing Group (TCG) has addressed a new generation of computing platforms employing both supplemental hardware and software with the primary goal to improve the secu...
Ahmad-Reza Sadeghi, Marcel Selhorst, Christian St&...
ASPLOS
2012
ACM
12 years 4 months ago
Comprehensive kernel instrumentation via dynamic binary translation
Dynamic binary translation (DBT) is a powerful technique that enables fine-grained monitoring and manipulation of an existing program binary. At the user level, it has been emplo...
Peter Feiner, Angela Demke Brown, Ashvin Goel
ISLPED
2005
ACM
103views Hardware» more  ISLPED 2005»
14 years 2 months ago
A technique for low energy mapping and routing in network-on-chip architectures
Network-on-chip (NoC) has been proposed as a solution for the global communication challenges of System-on-chip (SoC) design in the nanoscale technologies. NoC design with mesh ba...
Krishnan Srinivasan, Karam S. Chatha
IVA
2007
Springer
14 years 3 months ago
Proactive Authoring for Interactive Drama: An Author's Assistant
Interactive drama allows people to participate actively in a dynamically unfolding story, by playing a character or by exerting directorial control. One of the central challenges f...
Mei Si, Stacy Marsella, David V. Pynadath
SIGSOFT
2009
ACM
14 years 9 months ago
Automatic steering of behavioral model inference
Many testing and analysis techniques use finite state models to validate and verify the quality of software systems. Since the specification of such models is complex and timecons...
David Lo, Leonardo Mariani, Mauro Pezzè