212 search results - page 37 / 43 » Test Input Generation Using UML Sequence and State Machines ... |
ICCTA
2007
IEEE
13 years 11 months ago
2007
IEEE
The variables of the high-level specifications and the automatically generated temporary variables are mapped on to the data-path registers during data-path synthesis phase of hig...
CVPR
1998
IEEE
14 years 9 months ago
1998
IEEE
A new approach to the recognition of temporal behaviors and activities is presented. The fundamental idea, inspired by work in speech recognition, is to divide the inference probl...
QEST
2009
IEEE
14 years 2 months ago
2009
IEEE
—Traviando is a trace analyzer and visualizer for simulation traces of discrete event dynamic systems. In this paper, we briefly outline recent extensions of Traviando towards a...
FORTE
2000
13 years 9 months ago
2000
The adventof multipoint(multicast-based) applications and the growth and complexity of the Internet has complicated network protocol design and evaluation. In this paper, we prese...
APIN
2002
13 years 7 months ago
2002
This paper describes a new learning by example mechanism and its application for digital circuit design automation. This mechanism uses finite state machines to represent the infer...