We present a software-based weighted random pattern scheme for testing delay faults in IP cores of programmable SoCs. We describe a method for determining static and transition pr...
In this paper we analyze the application of parallel and sequential evolutionary algorithms (EAs) to the automatic test data generation problem. The problem consists of automatica...
A tool has been developed to automate the testing and grading of design projects implemented in reprogrammable hardware. The server allows multiple students to test circuits in FP...
Christopher K. Zuver, Christopher E. Neely, John W...
In this paper we explore the problem of creating vulnerability signatures. A vulnerability signature matches all exploits of a given vulnerability, even polymorphic or metamorphic...
David Brumley, James Newsome, Dawn Xiaodong Song, ...
DSD-Crasher is a bug finding tool that follows a three-step approach to program analysis: D. Capture the program’s intended execution behavior with dynamic invariant detection....