61 search results - page 5 / 13 » Test Pattern Generation Under Low Power Constraints |
VTS
2000
IEEE
13 years 12 months ago
2000
IEEE
We propose a novel BIST technique for non-scan sequential circuits which does not modify the circuit under test. It uses a learning algorithm to build a hardware test sequence gen...
DAC
2009
ACM
14 years 8 months ago
2009
ACM
In this work, we present a new optical routing framework, O-Router for future low-power on-chip optical interconnect integration utilizing silicon compatible nano-photonic devices...
DAC
2009
ACM
14 years 2 months ago
2009
ACM
In this work, we present a new optical routing framework, O-Router for future low-power on-chip optical interconnect integration utilizing silicon compatible nano-photonic devices...
CDC
2009
IEEE
13 years 11 months ago
2009
IEEE
The aim of this study is to design a controller based on model predictive control (MPC) theory to smooth wind power generation along with the controlled storage of the wind energy ...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
This paper presents a variation resilient circuit design technique for maintaining parametric yield of design under inherent variation in process parameters. We propose to utilize...