244 search results - page 37 / 49 » Testing Digital Circuits with Constraints |
FPL
1999
Springer
14 years 27 days ago
1999
Springer
Although verification and simulation tools are always improving, the results they provide remain hard to analyze and interpret. On one hand, verification sticks to the functional ...
ITC
1997
IEEE
14 years 25 days ago
1997
IEEE
- An all-digital technique for the measurement of the jitter transfer function of charge-pump phase-locked loops is introduced. Input jitter may be generated using one of two metho...
IEICET
2008
13 years 8 months ago
2008
This paper studies impact of the well edge proximity effect on digital circuit delay, based on model parameters extracted from test structures in an industrial 65nm wafer process. ...
ISQED
2003
IEEE
14 years 1 months ago
2003
IEEE
—As the operating frequency of digital systems increases and voltage swing decreases, it becomes very important to characterize and analyze power distribution networks (PDNs) acc...
EH
2000
IEEE
14 years 1 months ago
2000
IEEE
Evolvable Hardware (EHW) has been proposed as a new technique to design complex systems. Often, complex systems turn out to be very difficult to evolve. The problem is that a gen...