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ASPDAC
2004
ACM
112views Hardware» more  ASPDAC 2004»
14 years 2 months ago
Longest path selection for delay test under process variation
- Under manufacturing process variation, a path through a fault site is called longest for delay test if there exists a process condition under which the path has the maximum delay...
Xiang Lu, Zhuo Li, Wangqi Qiu, D. M. H. Walker, We...
ESOP
2007
Springer
14 years 1 months ago
Scalar Outcomes Suffice for Finitary Probabilistic Testing
Abstract. The question of equivalence has long vexed research in concurrency, leading to many different denotational- and bisimulation-based approaches; a breakthrough occurred wit...
Yuxin Deng, Rob J. van Glabbeek, Carroll Morgan, C...
TCAD
2002
134views more  TCAD 2002»
13 years 8 months ago
Testing and diagnosis of interconnect faults in cluster-based FPGA architectures
As IC densities are increasing, cluster-based FPGA architectures are becoming the architecture of choice for major FPGA manufacturers. A cluster-based architecture is one in which...
Ian G. Harris, Russell Tessier
LICS
2008
IEEE
14 years 3 months ago
Nonlocal Flow of Control and Kleene Algebra with Tests
Kleene algebra with tests (KAT) is an equational system for program verification that combines Kleene algebra (KA), or the algebra of regular expressions, with Boolean algebra. I...
Dexter Kozen
COMPSAC
2007
IEEE
14 years 3 months ago
Learning Parameterized State Machine Model for Integration Testing
Although many of the software engineering activities can now be model-supported, the model is often missing in software development. We are interested in retrieving statemachine m...
Muzammil Shahbaz, Keqin Li 0002, Roland Groz