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ISVC
2007
Springer
14 years 4 months ago
ChipViz : Visualizing Memory Chip Test Data
This paper presents a technique that allows test engineers to visually analyze and explore within memory chip test data. We represent the test results from a generation of chips al...
Amit P. Sawant, Ravi Raina, Christopher G. Healey
ICCD
2003
IEEE
145views Hardware» more  ICCD 2003»
14 years 7 months ago
Care Bit Density and Test Cube Clusters: Multi-Level Compression Opportunities
: Most of the recently discussed and commercially introduced test stimulus data compression techniques are based on low care bit densities found in typical scan test vectors. Data ...
Bernd Könemann
DCC
2004
IEEE
14 years 1 months ago
LZW Based Compressed Pattern Matching
Compressed pattern matching is an emerging research area that addresses the following problem: given a file in compressed format and a pattern, report the occurrence(s) of the pat...
Tao Tao, Amar Mukherjee
ICCAD
2006
IEEE
113views Hardware» more  ICCAD 2006»
14 years 7 months ago
A novel framework for faster-than-at-speed delay test considering IR-drop effects
Faster-than-at-speed test have been proposed to detect small delay defects. While these techniques increase the test frequency to reduce the positive slack of the path, they exace...
Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram
ITC
1993
IEEE
95views Hardware» more  ITC 1993»
14 years 2 months ago
Fault Diagnosis of Flash ADC using DNL Test
This paper describes a technique which uses the Differential Non Linearity (DNL) test data for fault location and identification of the analog components of a flash ADC. In a flash...
Anchada Charoenrook, Mani Soma