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LCTRTS
2000
Springer
13 years 11 months ago
Approximation of Worst-Case Execution Time for Preemptive Multitasking Systems
The control system of many complex mechatronic products requires for each task the Worst Case Execution Time (WCET), which is needed for the scheduler's admission tests and su...
Matteo Corti, Roberto Brega, Thomas R. Gross
ISCA
1995
IEEE
120views Hardware» more  ISCA 1995»
13 years 11 months ago
Streamlining Data Cache Access with Fast Address Calculation
For many programs, especially integer codes, untolerated load instruction latencies account for a significant portion of total execution time. In this paper, we present the desig...
Todd M. Austin, Dionisios N. Pnevmatikatos, Gurind...
ISCA
1995
IEEE
98views Hardware» more  ISCA 1995»
13 years 11 months ago
Instruction Fetching: Coping with Code Bloat
Previous research has shown that the SPEC benchmarks achieve low miss ratios in relatively small instruction caches. This paper presents evidence that current software-development...
Richard Uhlig, David Nagle, Trevor N. Mudge, Stuar...
DAC
2010
ACM
13 years 10 months ago
Scalable specification mining for verification and diagnosis
Effective system verification requires good specifications. The lack of sufficient specifications can lead to misses of critical bugs, design re-spins, and time-to-market slips. I...
Wenchao Li, Alessandro Forin, Sanjit A. Seshia
USS
2008
13 years 9 months ago
Highly Predictive Blacklisting
The notion of blacklisting communication sources has been a well-established defensive measure since the origins of the Internet community. In particular, the practice of compilin...
Jian Zhang, Phillip A. Porras, Johannes Ullrich