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DATE
2000
IEEE
132views Hardware» more  DATE 2000»
14 years 13 days ago
Automatic Test Bench Generation for Validation of RT-Level Descriptions: An Industrial Experience
In current microprocessors and systems, an increasingly high silicon portion is derived through automatic synthesis, with designers working exclusively at the RT-level, and design...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
COLT
2007
Springer
13 years 12 months ago
Resampling-Based Confidence Regions and Multiple Tests for a Correlated Random Vector
We study generalized bootstrapped confidence regions for the mean of a random vector whose coordinates have an unknown dependence structure, with a non-asymptotic control of the co...
Sylvain Arlot, Gilles Blanchard, Étienne Ro...
FSTTCS
2006
Springer
13 years 11 months ago
Testing Probabilistic Equivalence Through Reinforcement Learning
We propose a new approach to verification of probabilistic processes for which the model may not be available. We use a technique from Reinforcement Learning to approximate how far...
Josee Desharnais, François Laviolette, Sami...
ICMLA
2008
13 years 9 months ago
Group Testing in the Development of an Expanded Cancer Staging System
Though the TNM (Tumor, Lymph Node, Metastasis) is a widely used staging system for predicting the outcome of cancer patients, it is limited in prediction mainly because it does no...
Dechang Chen, Kai Xing, Donald Henson, Li Sheng
WCE
2007
13 years 9 months ago
A Graph-based Framework for High-level Test Synthesis
Improving testability during the early stages of High-level synthesis has several advantages including reduced test hardware overhead and design iterations. Recently, BIST techniq...
Ali Pourghaffari bashari, Saadat Pourmozafari