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CSREAESA
2009
13 years 8 months ago
Built-In Self-Test of Embedded SEU Detection Cores in Virtex-4 and Virtex-5 FPGAs
A Built-In Self-Test (BIST) approach is presented for the Internal Configuration Access Port (ICAP) and Frame Error Correcting Code (ECC) logic cores embedded in Xilinx Virtex-4 an...
Bradley F. Dutton, Charles E. Stroud
DATE
2007
IEEE
91views Hardware» more  DATE 2007»
14 years 2 months ago
Remote testing and diagnosis of System-on-Chips using network management frameworks
This paper presents a new approach that allows remote testing and diagnosis of complex (Systems-on-Chip) and embedded IP cores. The approach extends both on-chip design-for-test (...
Oussama Laouamri, Chouki Aktouf
EURODAC
1994
IEEE
123views VHDL» more  EURODAC 1994»
13 years 12 months ago
Testing redundant asynchronous circuits by variable phase splitting
An approach for stuck-at-i and delay-fault testing of redundant circuits without modifying the logic is proposed. The only requirement is the ability to control both phases of eac...
Luciano Lavagno, Antonio Lioy, Michael Kishinevsky
COMCOM
1999
124views more  COMCOM 1999»
13 years 7 months ago
Minimizing the Cost of Fault Location when Testing from a Finite State Machine
If a test does not produce the expected output, the incorrect output may have been caused by an earlier state transfer failure. Ghedamsi and von Bochmann [1992] and Ghedamsi et al...
Robert M. Hierons
ICPR
2000
IEEE
14 years 8 months ago
Structural Defects: General Approach and Application to Textile Inspection
This paper addresses detection of imperfections in repetitive regular structures (textures). Humans can easily find such defects without prior knowledge of the `good' pattern...
Dmitry Chetverikov